Belle II KLM Scint Firmware  1
rx_ll.vhd
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48 
49 --
50 -- RX_LL
51 --
52 --
53 --
54 -- Description: The RX_LL module receives data from the Aurora Channel,
55 -- converts it to LocalLink and sends it to the user interface.
56 -- It also handles NFC and UFC messages.
57 --
58 -- This module supports 1 2-byte lane designs.
59 --
60 --
61 
62 library IEEE;
63 use IEEE.STD_LOGIC_1164.all;
64 
65 entity RX_LL is
66 port(
67  -- LocalLink PDU Interface
68  RX_D : out std_logic_vector(0 to 15);
69  RX_REM : out std_logic;
70  RX_SRC_RDY_N : out std_logic;
71  RX_SOF_N : out std_logic;
72  RX_EOF_N : out std_logic;
73  -- Global Logic Interface
74  START_RX : in std_logic;
75  -- Aurora Lane Interface
76  RX_PAD : in std_logic;
77  RX_PE_DATA : in std_logic_vector(0 to 15);
78  RX_PE_DATA_V : in std_logic;
79  RX_SCP : in std_logic;
80  RX_ECP : in std_logic;
81  -- Error Interface
82  FRAME_ERR : out std_logic;
83  -- System Interface
84  USER_CLK : in std_logic);
85 end RX_LL;
86 
87 architecture MAPPED of RX_LL is
88 
89 -- External Register Declarations --
90 
91  signal RX_D_Buffer : std_logic_vector(0 to 15);
92  signal RX_REM_Buffer : std_logic;
93  signal RX_SRC_RDY_N_Buffer : std_logic;
94  signal RX_SOF_N_Buffer : std_logic;
95  signal RX_EOF_N_Buffer : std_logic;
96  signal FRAME_ERR_Buffer : std_logic;
97 
98 -- Wire Declarations --
99 
100  signal start_rx_i : std_logic;
101 
102 -- Component Declarations --
103 
104  component RX_LL_PDU_DATAPATH
105 
106  port (
107 
108  -- Traffic Separator Interface
109 
110  PDU_DATA : in std_logic_vector(0 to 15);
111  PDU_DATA_V : in std_logic;
112  PDU_PAD : in std_logic;
113  PDU_SCP : in std_logic;
114  PDU_ECP : in std_logic;
115 
116  -- LocalLink PDU Interface
117 
118  RX_D : out std_logic_vector(0 to 15);
119  RX_REM : out std_logic;
120  RX_SRC_RDY_N : out std_logic;
121  RX_SOF_N : out std_logic;
122  RX_EOF_N : out std_logic;
123 
124  -- Error Interface
125 
126  FRAME_ERR : out std_logic;
127 
128  -- System Interface
129 
130  USER_CLK : in std_logic;
131  RESET : in std_logic
132 
133  );
134 
135  end component;
136 
137 
138 begin
139 
140  RX_D <= RX_D_Buffer;
141  RX_REM <= RX_REM_Buffer;
142  RX_SRC_RDY_N <= RX_SRC_RDY_N_Buffer;
143  RX_SOF_N <= RX_SOF_N_Buffer;
144  RX_EOF_N <= RX_EOF_N_Buffer;
145  FRAME_ERR <= FRAME_ERR_Buffer;
146 
147  start_rx_i <= not START_RX;
148 
149 -- Main Body of Code --
150 
151  -- Datapath for user PDUs --
152 
153  rx_ll_pdu_datapath_i : RX_LL_PDU_DATAPATH
154 
155  port map (
156 
157  -- Traffic Separator Interface
158 
159  PDU_DATA => RX_PE_DATA,
160  PDU_DATA_V => RX_PE_DATA_V,
161  PDU_PAD => RX_PAD,
162  PDU_SCP => RX_SCP,
163  PDU_ECP => RX_ECP,
164 
165  -- LocalLink PDU Interface
166 
167  RX_D => RX_D_Buffer,
168  RX_REM => RX_REM_Buffer,
169  RX_SRC_RDY_N => RX_SRC_RDY_N_Buffer,
170  RX_SOF_N => RX_SOF_N_Buffer,
171  RX_EOF_N => RX_EOF_N_Buffer,
172 
173  -- Error Interface
174 
175  FRAME_ERR => FRAME_ERR_Buffer,
176 
177  -- System Interface
178 
179  USER_CLK => USER_CLK,
180  RESET => start_rx_i
181 
182  );
183 
184 
185 end MAPPED;
Definition: rx_ll.vhd:65