Belle II KLM Scint Firmware  1
fifo_cc_arch Architecture Reference

Processes

PROCESS_29  ( clk )
FIFO_CNT_PROC  ( clk )
RW_ADDR_PROC  ( clk )

Constants

ZERO_ADDR  std_logic_vector ( DEPTH- 1 downto 0 ) := ( others = > ' 0 ' )
MAX_ADDR  std_logic_vector ( DEPTH- 1 downto 0 ) := ( others = > ' 1 ' )

Signals

i_ren  std_logic
i_full  std_logic
i_empty  std_logic
i_empty_r  std_logic
i_waddr  std_logic_vector ( DEPTH- 1 downto 0 ) := ( others = > ' 0 ' )
i_raddr  std_logic_vector ( DEPTH- 1 downto 0 ) := ( others = > ' 0 ' )
i_cnt  std_logic_vector ( DEPTH- 1 downto 0 ) := ( others = > ' 0 ' )

Instantiations

bram_i  bram_sdp_cc <Entity bram_sdp_cc>

Detailed Description

Definition at line 121 of file mem.vhd.


The documentation for this class was generated from the following file: