implementation Architecture Reference

Processes
proc_reset	( clk_127 )
PROCESS_171	( clk_xcm127 )

Signals
clk_127	std_logic := ' 0 '
sig_127	std_logic := ' 0 '
sig_fbout	std_logic := ' 0 '
clk_fb	std_logic := ' 0 '
sta_xcm	std_logic := ' 0 '
clr_xcm	std_logic := ' 0 '
sta_ictrl	std_logic := ' 1 '
clr_ictrl	std_logic := ' 0 '
cnt_xcmreset	std_logic_vector ( 3 downto 0 ) := ( others = > ' 0 ' )
cnt_xcmlock	std_logic_vector ( 13 downto 0 ) := ( others = > ' 0 ' )
cnt_ictrl	std_logic_vector ( 9 downto 0 ) := ( others = > ' 0 ' )
clk_xcm127	std_logic := ' 0 '
sig_xcm127	std_logic := ' 0 '
sig_xcm127b	std_logic := ' 0 '
sig_inv127	std_logic := ' 0 '
sig_xcm254	std_logic := ' 0 '
	uncomment
sig_clk3	std_logic := ' 0 '
	add
cnt_lck	std_logic_vector ( 15 downto 0 ) := ( others = > ' 0 ' )
sig_lckd	std_logic := ' 0 '

Instantiations
map_ick	ibufds
map_ig	bufg
map_fb	bufg
map_127g	bufg
map_invg	bufg
map_254g	bufg
map_64g	bufg
	add
map_pll	pll_base
	add

Detailed Description

Definition at line 47 of file b2tt_clk_s6.vhd.

Member Data Documentation

map_pll

map_pll pll_base

Instantiation

add

uncomment

Definition at line 125 of file b2tt_clk_s6.vhd.

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The documentation for this class was generated from the following file:

• b2tt/b2tt/b2tt_clk_s6.vhd