RTL Architecture Reference

Processes
PROCESS_159	( USER_CLK )
PROCESS_160	( USER_CLK )
PROCESS_161	( USER_CLK )
PROCESS_162	( TX_EOF_N , TX_REM )
PROCESS_163	( USER_CLK )
PROCESS_164	( USER_CLK )
PROCESS_165	( TX_EOF_N , TX_REM )
PROCESS_166	( USER_CLK )
PROCESS_167	( USER_CLK )
PROCESS_168	( USER_CLK )

Constants
DLY	time := 1 ns

Signals
TX_PE_DATA_V_Buffer	std_logic
GEN_PAD_Buffer	std_logic
TX_PE_DATA_Buffer	std_logic_vector ( 0 to 15 )
in_frame_r	std_logic
storage_r	std_logic_vector ( 0 to 15 )
storage_v_r	std_logic
storage_pad_r	std_logic
tx_pe_data_r	std_logic_vector ( 0 to 15 )
valid_c	std_logic
tx_pe_data_v_r	std_logic
gen_pad_c	std_logic
gen_pad_r	std_logic
ll_valid_c	std_logic
in_frame_c	std_logic

Detailed Description

Definition at line 82 of file tx_ll_datapath.vhd.

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The documentation for this class was generated from the following file:

• klm_aurora/source/tx_ll_datapath.vhd