GTP_WRAPPER Entity Reference

Inheritance diagram for GTP_WRAPPER:

Entities
BEHAVIORAL	architecture

Libraries
ieee
UNISIM

Use Clauses
std_logic_1164
numeric_std
Vcomponents

Generics
SIM_GTPRESET_SPEEDUP	integer := 0
CLK_CORRECT_USE	boolean := TRUE

Ports
LOOPBACK_IN	in std_logic_vector ( 2 downto 0 )
RXCHARISCOMMA_OUT	out std_logic_vector ( 1 downto 0 )
RXCHARISK_OUT	out std_logic_vector ( 1 downto 0 )
RXDISPERR_OUT	out std_logic_vector ( 1 downto 0 )
RXNOTINTABLE_OUT	out std_logic_vector ( 1 downto 0 )
RXBUFERR_OUT	out std_logic
RXREALIGN_OUT	out std_logic
ENMCOMMAALIGN_IN	in std_logic
ENPCOMMAALIGN_IN	in std_logic
RXDATA_OUT	out std_logic_vector ( 15 downto 0 )
RXRECCLK1_OUT	out std_logic
RXRECCLK2_OUT	out std_logic
RXRESET_IN	in std_logic
RXUSRCLK_IN	in std_logic
RXUSRCLK2_IN	in std_logic
RXEQMIX_IN	in std_logic_vector ( 1 downto 0 )
RX1N_IN	in std_logic
RX1P_IN	in std_logic
RXPOLARITY_IN	in std_logic
DADDR_IN	in std_logic_vector ( 7 downto 0 )
DCLK_IN	in std_logic
DEN_IN	in std_logic
DI_IN	in std_logic_vector ( 15 downto 0 )
DRDY_OUT	out std_logic
DRPDO_OUT	out std_logic_vector ( 15 downto 0 )
DWE_IN	in std_logic
REFSELDYPLL	in std_logic_vector ( 2 downto 0 )
REFCLK0	in std_logic
REFCLK1	in std_logic
GCLK	in std_logic
GTPRESET_IN	in std_logic
PLLLKDET_OUT	out std_logic
TXCHARISK_IN	in std_logic_vector ( 1 downto 0 )
TXDATA_IN	in std_logic_vector ( 15 downto 0 )
GTPCLKOUT_OUT	out std_logic_vector ( 1 downto 0 )
TXRESET_IN	in std_logic
TXUSRCLK_IN	in std_logic
TXUSRCLK2_IN	in std_logic
TXBUFERR_OUT	out std_logic
TX1N_OUT	out std_logic
TX1P_OUT	out std_logic
RXCHARISCOMMA_OUT_unused	out std_logic_vector ( 1 downto 0 )
RXCHARISK_OUT_unused	out std_logic_vector ( 1 downto 0 )
RXDISPERR_OUT_unused	out std_logic_vector ( 1 downto 0 )
RXNOTINTABLE_OUT_unused	out std_logic_vector ( 1 downto 0 )
RXREALIGN_OUT_unused	out std_logic
RXDATA_OUT_unused	out std_logic_vector ( 15 downto 0 )
RX1N_IN_unused	in std_logic
RX1P_IN_unused	in std_logic
RXBUFERR_OUT_unused	out std_logic_vector ( 2 downto 0 )
TXBUFERR_OUT_unused	out std_logic_vector ( 1 downto 0 )
CHBONDDONE_OUT_unused	out std_logic
TX1N_OUT_unused	out std_logic
TX1P_OUT_unused	out std_logic
POWERDOWN_IN	in std_logic

Detailed Description

Definition at line 73 of file transceiver_wrapper.vhd.

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The documentation for this class was generated from the following file:

• klm_aurora/source/transceiver_wrapper.vhd