hardware:

• before SCROD revA2 is powered, there needs to be a 2cm piece of insulating kapton tape put where the shielding tabs from the RJ45 connectors on SCROD revA2 come into contact with the interconnect board (revA or revB; future versions of the interconnect board will have no traces in this area) - the same tape is needed on other boards that SCROD plugs into directly (eKLM_MB, ATF2_MB, etc) - remember each time you plug in a SCROD revA2 to a new board, make sure this tape is in place before plugging it in
• RA2 (originally installed as a 10k resistor on SCRODs #13-#26) must be changed out for a 2.4k resistor - the FPGA will not look for a program on the SPI flash when booted until this is done
• the FET that controls whether the LEDs can be on is miswired so that the LEDs are always capable of being on (need to flip the FET over to exchange source and drain or wait for a part with a different pinout)
• remove RB6, RF3, RB7, RF4 to get the oscillators to work (resistive divider does not work as intended)
• to get the cypress USB microcontroller to have a program when it boots up, replace it with one from here: octopart 24lc64x (alternately, you can remove EEPROM1, rotate it 90 degrees counterclockwise, glue it in place to avoid shorting to the resistor RC1, and solder 30 AWG wires from part to pads.

switch positions

• the left switch controls the LEDs (switch=down to allow the LEDs to be on; switch=up turns them off)
• the right switch controls which jtag connector is connected to the FPGA (switch=down for local jtag on the 14 pin header; switch=up for remote/LVDS jtag)

firmware:

• there are a few modifications to ucf file because of changes in wiring (here is the version for the boardstack; the changes are also listed on the bottom of page 2 of the pdf of the schematic)
• bitgen needs a couple of options enabled/changed to get QSPI flash to work:
  • right click on "Generate Programming File" and in "General Options" change "Enable BitStream Compression" to yes
  • in "Configuration Options", change "Configuration Rate" to 26 (corresponds to 26 MHz)
  • in "Configuration Options", change "Set SPI Configuration Bus Width" to 4 (this makes the transfer to the flash memory one nybble wide)
• for impact mcs file creation:
  • in "Create PROM File (PROM File Formatter)", under "SPI Flash", select "Configure Single FPGA", then hit the arrow and select "64M" and then "Add Storage Device", then click the next arrow and change the output file name to whatever you like (should end in .mcs) and make sure the output file location is where you want, and then hit "OK"
  • next, add the bitfile with which you would have otherwise programmed the FPGA directly and then hit no when it asks if you want to add more bitfiles to the PROM file
  • with no items highlighted in the graphical diagram in the top right pane, right-click on the background and select "Generate File" (this should generate the mcs file)
• to program the PROM:
  • go to "Boundary Scan", right-click on the background of the top pane and select "initialize chain"
  • for the FPGA, select "Bypass" instead of a bitfile
  • right-click on the "SPI/BPI ?" icon above the FPGA's icon and select "Add SPI/BPI Flash", then give it the .mcs file impact created for you
  • in the "Select Attached SPI/BPI" dialog box, change the device to "W25Q64BV/CV" and make sure the "Data Width" is set to 4
  • to program the flash memory, right-click on the SPI/BPI icon and select "program" (this step takes about 3.5 minutes and it should load the FPGA with the program when it is finished)

reference schematic (pdf) / layout (pdf) / gerber files and a list of changes for the revA2

also see:

• SCROD (schematics/info on the FPGA board in the boardstack)
• carriers (schematics/info on mating boards in the boardstack, as well as I2C addresses and example ucf file)
• other TOP (schematics/info on other boards in the boardstack)