This page describes how to set up Cadence Virtuoso version IC616 on CentOS5.11 x86_64 (or CentOS6.7 64bit), and how to set up a design kit (TSMC 130nm / mosis "tsmc13rf") to design a mixed-signal asic. Beyond that, there's a few hints and tips about how to actually go about getting the tools to do what you want. These instructions assume you're using bash as your shell. Notes last updated 2016-02-23.

Previous versions of this document (for other/older versions of CentOS/Virtuoso/PDK, etc) can be found here:

• 2010-2011 version; IBM 130nm cmrf8sf/8rf-dm; IC614/Virtuoso 6.1.4
• 2012 version; IBM 130nm cmrf8sf/8rf-dm; IC615/Virtuoso 6.1.4

ToC:

• prepare cadence server:
  • install linux and required packages
  • a few notes on security
  • install cadence virtuoso
  • install a design kit
  • install adexl/mmsim/spectre for simulations
• setup and run cadence:
  • set up and use cadence virtuoso with a design kit
  • set up for remote cadence work
  • set up ms windows (for remote cadence work)
  • set up and run simulations
  • set up and run Calibre DRC (design rule check)
  • set up and run Assura DRC (design rule check)
  • set up and run Assura LVS (layout versus schematic)
  • set up and run Assura QRC (parasitic extraction)
  • keyboard shortcuts
  • tips and hints
• stuff I still need to figure out
• references

choose "linux text" at the boot prompt to avoid the install GUI

after install/reboot, perform the following steps:

• sudo yum update

• In order to run installscape:

  sudo yum groupinstall "X Window System"

• some optional installs:

  sudo yum install firefox gvim vim-enhanced

• other:
• disable wifi encryption stuff (for wired-only machines):

  sudo chkconfig wpa_supplicant off

• disable bluetooth stuff (not needed for us):

  sudo chkconfig bluetooth off

• disable the automounter, likely good for security:

  sudo chkconfig autofs off

Actual honest-to-goodness information and physical security are seriously difficult tasks. However, just because you know you can't make it bulletproof doesn't mean you should do nothing. Securing things against casual mistakes and minor intrusion attempts is worthwhile. Here are a few tips:

• install asic design tools as a special "asic" user:
  • useradd -m asic --user-group
  • umask 0027 # should go in that user's ~/.bashrc - makes things group not-writable and all not-anythingable by default
  • export GID=$(grep ^asic /etc/group | sed -e "s,asic:x:\([0-9]\+\):.*,\1,") # this should also go in ~/.bashrc
• create an "asic" group (created with above useradd --user-group command) and only let users in that group have access to asic design tools/files
• add users to that group with:
  • usermod --append --groups asic USERNAME
• run the following after installing something in /opt/cadence/:
  • sudo find /opt/cadence -not -uid ${UID} -o -not -gid ${GID} -exec chown --changes asic:asic {} +
  • find /opt/cadence -perm -ga+w -exec chmod --changes ga-w {} + # finds all files/dirs that are group/all writable and turns that off
• after an asic tapeout, make a copy of the design files to a shared location readable only by the asic group, and then make it read-only with:
  • sudo find /home/asic/reference-designs -not -uid ${UID} -o -not -gid ${GID} -exec chown --changes asic:asic {} + # or steve:asic if you like
  • find /home/asic/reference-designs -type f -exec chmod --changes 440 {} + -o -type d -exec chmod --changes 550 {} +
• if someone wants to make a "v2" of that reference asic, they should copy the files from that reference design to a new location and work from there (or better yet, use the principle of copy-on-write and just make new cells in the VettedASICv2 library that are genuinely different from those in the v1 library)
• set up an iptables firewall and make it restrictive, set up rsyslog to log strange accesses and set up logrotate to email you when they occur

• there's an "install_cadence" script that installs the following required packages via yum before attempting to install cadence:

  sudo yum install ksh glibc.i686 glibc-devel.i686 libXext.i686 libXtst.i686 libXt.i686 mesa-libGL.i686 mesa-libGL.i686 libXft.so.2 libXp.so.6

• tweak that script to match the current release name of the Base or Hotfix and what steps it should perform (near the bottom of the file)
• on the machine itself (X11-forwarding for installscape might be tricky to set up), from the location on the filesystem you downloaded the Base or Hotfix release, run the script
• point it to the location of the extracted "CDROM," and click start
• the last step in installscape is cadence configuration:
  • Valid library: enter (no)
  • XL library: enter (no)
  • add IUS installation directory to path: 2 (quit)
  • openaccess: enter enter enter
  • configure status: success
• cadence should now be installed and configured - to run it, source bashrc-64 and type virtuoso
• other notes on installation:
  • If you move the virtuoso install (even just by changing the location of the symlink), you may need to do the following:
  • cd /opt/cadence/virtuoso/IC616/share; rm oa; ln -s ../oa_v22.43.018 oa # was an absolute path before
  • add " CADENCE" to the line in /etc/hosts starting with "127.0.0.1 localhost" # without this, you get "cadence could not export the license service for the session XXX on host" and "Unable to start up library manager (libManager.exe) after 60 tries" error messages - alternately, the /etc/hosts file can have another line with the ip address of your cadence machine and then " cadence" - this is a problem when your cadence machine does not have a fully qualified domain name
• or see alternative installation instructions below

alternative installation instructions

• grab InstallScape04.23s010lnx86.t.Z (which is a tar gzip), tar xzf the .t.Z file from /opt/cadence/installscape
• add /opt/cadence/installscape/iscape/bin to your PATH in ~/.bashrc and re-source it or re-login
• do startx as the asic user, run iscape.sh in a terminal and it will bring up the GUI
• every time the "configuration" step asks you "do you want to use a different openaccess installation?" answer n for no.

• the PDK file on the mosis downloads that mentions "CADENCE OA6.1 VERSION" is the design kit you want (get any patches, too, if applicable):

  [ZIP] T-013-MM-SP-001-K3 , Rev. 1.4C, 0.13 UM RF 1P8M SALICIDE 1.2V/2.5V/3.3V 1P8M FSG PDK (CR013G)(CADENCE OA6.1 VERSION) [16-FEB-2012; 647M bytes]
  [ZIP] T-013-MM-SP-001-K4 , Rev. 1.4C_3, 0.13 UM RF 1P8M SALICIDE 1.2V/2.5V/3.3V 1P8M FSG PDK PATCH (CR013G)(CADENCE OA6.1 VERSION) [26-DEC-2012; 4754k bytes]
  

• unpack:
  • unzip T-013-MM-SP-001-K3.zip; unzip T-013-MM-SP-001-K4.zip
  • tar xzf tsmc13rf_FSG_12v_25v_33v_T-013-MM-SP-001-K3_v1.4c_IC61_20120217_all.tar.gz; tar xzf tsmc13rf_FSG_12v_25v_33v_T-013-MM-SP-001-K4_v1.4c_Patch3_20121221_all.tar.gz
  • tar xzf tsmc13rf_FSG_12v_25v_33v_T-013-MM-SP-001-K3_v1.4c_IC61_20120217.tar.gz; tar xzf tsmc13rf_FSG_12v_25v_33v_T-013-MM-SP-001-K4_v1.4c_Patch3_20121221.tar.gz
  • perl pdkInstall.pl # choose 1 1 1 T-013-MM-SP.RF-1P8M-FSG-IMD y # puts files in T-013-MM-SP.RF-1P8M-FSG-IMD subdir
  • mv tsmc13rf_FSG_12v_25v_33v_T-013-MM-SP-001-K4_v1.4c_Patch3_20121221/ T-013-MM-SP.RF-1P8M-FSG-IMD/
  • cd T-013-MM-SP.RF-1P8M-FSG-IMD
  • chmod g-w . tsmcPdkInstall.log tsmc13 Calibre/lvs_rcx/CAP_SWITCH Calibre/lvs_rcx/calibre.lvs Calibre/lvs_rcx/calibre.xrc models/hspice/hspice.mdl # these files are otherwise group-writable, which is not what we want
  • cd tsmc13rf_FSG_12v_25v_33v_T-013-MM-SP-001-K4_v1.4c_Patch3_20121221
  • . ~/bin/bashrc-64.IC616
  • perl pdkPatchInstall.pl # complains of not being able to open X session to CADENCE:80 if not logged in as current user - hmmm - made a login for that user and it still complains... - seems the problem was that HOSTNAME was set to CADENCE (which is why it was trying CADENCE:80), but that didn't match a lookup on the network nor anything the /etc/hosts file, so a "sudo vim /etc/hosts" and add " cadence" to the "127.0.0.1 localhost ..." line should fix it.
  • btw, if the above doesn't work the first time and you need to run it again, you might have to do this first:
    • killall cdsXvnc
    • rm /tmp/.X11-unix/X*
  • cd ../..
• install:
  • mkdir -p /opt/cadence/design-kits/TSMC/130nm/TSMC-130nm # location of setup files for users to cp -ar
  • cp -ar T-013-MM-SP.RF-1P8M-FSG-IMD /opt/cadence/design-kits/TSMC/130nm/
  • cd /opt/cadence/design-kits/TSMC/130nm/
  • tar xzf DOC_tsmc13rf_FSG_T-013-MM-SP-001_v1.4c_IC61.tar.gz # puts documentation in PDK_doc/
  • cd /opt/cadence/design-kits/TSMC/130nm/TSMC-130nm # customize the setup files for users here
  • ln -s /opt/cadence/design-kits/TSMC/130nm/PDK_doc
  • find /opt/cadence/design-kits/TSMC/130nm/T-013-MM-SP.RF-1P8M-FSG-IMD -maxdepth 1 -mindepth 1 -type d -exec ln -s {} \; -o -type f -exec cp -a {} . \; # copy all files, symlink all dirs
  • rm .cadence # if it exists
  • customize cds.lib to either remove unwanted stuff that references $CDSHOME or change them to use $CDSDIR, then add a line that says "softinclude ${HOME}/cds.lib"
  • prepare a file called "bashrc-64" unique to your server, virtuoso version and design kit details that contains at least the following:

    export LM_LICENSE_FILE=port@server # customize this line for your license server
    export CDSDIR=/opt/cadence/virtuoso/IC616
    PATH=$PATH:$CDSDIR/bin:$CDSDIR/tools/bin
    export PATH

• still to do:

  copy bashrc for this design kit also
  

• before doing this, when trying to run an adexl simulation, you'll get this error message: "ADEXL-1612: Simulator not in path for the following tests: ..."
• you'll need to download MMSIM from the cadence download page (in this example, we'll use MMSIM151 15.10.257)
• check the integrity of the downloaded files; untar files; run setup script:

  md5sum -c *.md5
  for each in Base_MMSIM15.10.257*.tar; do tar xf ${each}; done
  cd MMSIM15.10.257_lnx86.Base/CDROM1
  ./SETUP.SH

• this script wants to know where installscape is installed, but then it'll complain that it's an old version, but use that one anyway
• script also wants to know where you want to install MMSIM, so give it a location (suggest /opt/cadence/MMSIM/MMSIM15.10.257), even though you'll have to give the location again in the GUI
• GUI will want to know the location of the SETUP.SH you're running (and other files) as well, so provide that
• add a symbolic link for MMSIM15 and a tools symlink for tools.lnx86:

  cd /opt/cadence/MMSIM
  ln -s MMSIM15.10.257 MMSIM15
  cd MMSIM15
  ln -s tools.lnx86 tools

• the bashrc-64 file in the design kit setup directory should contain these additional lines:

  export MMSIM_ROOT=/opt/cadence/MMSIM/MMSIM15
  PATH=$PATH:$MMSIM_ROOT/tools.lnx86/bin:$MMSIM_ROOT/tools.lnx86/spectre/bin

  export PATH
• ...

• copy the design kit setup files to your local dir:

  mkdir -p ~/asic/design-kits
  cp -ar /opt/cadence/design-kits/TSMC/130nm/TSMC-130nm ~/asic/design-kits/

• copy the cds.lib file:

  cp /home/asic/cds.lib ~

• remove any old locks on the design files in your library (if applicable) - make sure nobody's running cadence on designs in your library before doing this:

  find ~/asic/libraries -type f -name "*cdslck*" -exec rm {} \;
  			

• to run cadence, do:

  cadence

  output and errors will be placed in ~/asic/design-kits/TSMC-130nm/.virtuoso-messages

The key files are now:

• ~/cds.lib # this file describes what shows up in your library manager
• ~/asic/design-kits/TSMC-130nm/bashrc-64 # this defines the license server@port for cadence, as well as other environment variables for running assura/calibre/etc
• ~/bin/cadence # this script defines what design kit is active, and then sources the above bashrc-64 file and runs virtuoso

• modify your ~/.ssh/config to have (modify cadence_server_ip_address and username below as appropriate, and only uncomment the Compression line if you're *not* on the local wired network):

  Host cadence
  	HostName cadence_server_ip_address
  	ForwardX11 yes
  	#Compression yes
  	User username
  

• install xming
• install xming-fonts (otherwise the help browser and spectre plot axes will be wingdings-ish)
• install putty (make sure you forward X sessions)

• to set up a new simulation:
  • load a schematic and go to menu "Launch" / "ADE GXL"
  • select "create new" based on the (already selected?) schematic from the list
  • go to the "data view" / "tests" and click "click to add test" to add test
  • the buttons on the right of the "test editor" are useful - click the top one to choose an analysis (DC/AC/Transient/etc)
  • for transient analysis, set a "stop time" in seconds (remember to include the order of magnitude - 100n for nanoseconds, for instance)
  • for "accuracy default" chose conservative
  • the next button down is to "edit variables" - choose "copy from" schematic and then set each to some nominal value (these can be swept later, but need a nominal value initially)
  • the next button is "setup outputs" so you can display something in a waveform (click "from schematic" and then click on nets you'd like to see)
  • close the "test editor" window, hit save on the "analog design environment" project
• if you get the following message:

  19: Illegal library definition found in netlist
  			

  it is because you need to specify a section in the allModels.scs column ("tt" works)
• to use parasitic extraction to improve the realism of the simulation, perform the following steps:
  • on the left of the ADEGXL window, it says "No Parasitics/LDE" - change this to "Extracted (Parasitics/LDE)"
• if you get:

  ERROR (OSSHNL-116): Unable to descend into any of the views defined in the view list, 'spectre cmos_sch cmos.sch schematic veriloga', for the instance 'I31' in cell 'single_cell_test'. Either add one of these views to the library 'mza_test5', cell 'single_cell' or modify the view list to contain an existing view.
  				

  right-click on the test in ADE's data view, select "environment" and add one of the view names that exists for your design (in my case, this was "schematic_alternate_FF") to the view list.
• to store simulation files (which get quite large) somewhere other than $HOME/simulation, add the following few lines to your $HOME/.cdsinit (from this blog post):

  projectDir   envSetVal("asimenv.startup" "projectDir" ‘string "")
  saveResDir   envSetVal("adexl.results" "saveResDir" ‘string "")
  saveDir   envSetVal("adexl.results" "saveDir" ‘string "")
  

• IBM_PDK menu - "Checking" - "Calibre" - "DRC"
• Environmental Variable Setup:
  • BEOL_STACK: 3_2_3
  • CHECK_RECOMMENDED: ON
  • DENSITY_LOCAL: OFF
  • DESIGN_TYPE: CELL
  • LASTMETAL: MA
  • don't show this dialog again: check
• Calibre DRC: "view" - "tree options" - deselect "empty checks"
• sometimes, Calibre DRC refuses to work with a message along the lines of:

  ibmPdkrunCalibre("DRC")
  Starting DRC on top cell in window:2...
  nil
  		

  and the solution is to associate a new library TECH reference with it (a step that is sometimes forgotten when creating a library):
  • right-click on library in "library manager"
  • select "library properties"
  • if there is no "TECH" (or "techLibName") item at the bottom, click the "add" button and add a "TECH" item that is a string and make it equal to "cmrf8sf"
• "((20*M3) + (Pfet S/D not over T3)) / (union[NW,PI]) ratio <>>= 0.20" means one needs to connect some spare M3 to the substrate contact for the buried p-well, even if it doesn't do anything (for some reason)

• assura - run drc - select technology and rule set (and then run it):
  • for TSMC 130nm: "assura_tech" and "CAP_1P0" ("CDL_CAP_1P0" also works)
  • for TSMC 250nm: "TSMC025" and "default" ("default_cdl" also works?)

• assura - run lvs - select dfII, select technology and rule set (and then run it):
  • for TSMC 130nm: "assura_tech" and "CAP_1P0" ("CDL_CAP_1P0" doesn't work!)
  • for TSMC 250nm: "TSMC025" and "default" ("default_cdl" doesn't work!)

• (this will not work until Assura LVS (VLDB) has been run on the design)
• layout menu item QRC / "Setup Quantus QRC":
  • setup tab / set as default = "extracted view"
  • extraction tab / set as default = RC; ref node = "/gnd" (or "vss" or whatever your ground net is)
  • filtering options / Min C = 1.0 fF (or whatever you like)
  • netlisting options / parasitic R and C models = "do not include"
  • run details tab / enable multi processing; number of processors = 4
  • bottom of all tabs / technology and rule set:
    • for TSMC 130nm: "assura_tech" and "CAP_1P0" ("CDL_CAP_1P0" doesn't work!)
    • for TSMC 250nm: "TSMC025" and "default" ("default_cdl" doesn't work!)
• QRC menu - "run Assura QRC - Quantus QRC..." (make all options the same as above)
  • be sure "CellView Check" is unchecked and parasitic R and C models are *NOT* included in the netlist or it won't work
  • setup tab: set "output" to "extracted view"

• general (both schematic and layout):
  • f = zoom to fit to screen
  • [ - zoom out
  • ] - zoom in
  • w = wire (W = bus)
  • c = copy
  • m = stretch
  • l = add wire name
  • ctrl-left-click = deselect all (alternately, ctrl-D does the same)
  • esc = go up one level in mode hierarchy
  • E = descend into hierarchy
  • ctrl-E = go back up
  • middle-click = info/properties
  • i = insert component
  • u = undo
  • shift-u = redo
  • s = finish wire
  • p = add pin (in out blah<3:0> - the last one can be with bus expansion or not)
  • q = edit properties
• schematic only:
  • = = switch between schematic and symbol view
• layout only:
  • ctrl-r create ruler
  • shift-b to return to editing normally after editing in place

• general:
  • "exceeds nestability limit of 5" means there's another window open somewhere that has too many commands stacked up
  • Derek Loves Quark (DRC, then LVS, then QRC)
  • to re-associate an old layout with a new schematic, from the schematic, do file menu - "launch layout", then do "open existing" layout and "create new" configuration
  • CIW (main cadence/virtuoso) window "options" menu - "file preferences" - "prompt on exit" = no
  • CIW options menu - "log filter" - disable all but \e and \w (errors and warnings)
  • if you get:

    *ERROR* (DB-320001): Unable to get the Cadence(R) Design Framework II license feature of "111".

    contact support and give them the output of

    lmstat -f 111 -c port@server

• schematic only:
  • create menu - cellview from cellview to make symbol
• layout only:
  • display N levels deep in the hierarchy - "Options" -<>> "Display" -<>> "Display Levels" -<>> "stop"
  • to make a cell border, from the create menu - "P<&>R objects" - "area boundary"
  • view menu - "background" to select another layout to copy from (onion skin)
  • "Generate All From Source" to get items from schematic to appear in layout
  • "edit in place" a group, then select an item, then "edit menu" - group - "remove from group" becomes active
  • "create" menu - "group" to group items together
  • "Place as in Schematic" to do a rough move
  • use "align" to align things
  • if you replace a component in schematic, you can update it in layout by right-clicking on the object in the navigator and selecting "update" - "from source"

• silently ignore the read-only status of the cells in the reference_designs
• color-code libraries
• use categories; show them by default
• deselect "User Preferences" -<>> "Options displayed when commands start" to stop mouse from jumping to dialogbox windows
• prevent pop-under of dialog boxes
• export schematics as vector graphics in a hierarchical way with cross-referencing

• setting up cadence v6.1 for the IBM 130nm process (Mike Cooney)
• 2010 Spring PHYS 476 - special ASIC edition of Electronics for Physicists (Gary Varner)
• notes on design kit install (Mike Cooney)
• solution to error "19: Illegal library definition found in netlist"
• Install Cadence 6.1 on Ubuntu 10.04
• cadence layout tips
• utah.edu cadence setup file
• things you didn't know about virtuoso library manager
• cadence custom IC (CIC) design blog