Belle II KLM Scint Firmware  1
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sfp_stat_ctrl.vhd
1 --*********************************************************************************
2 -- Indiana University
3 -- Center for Exploration of Energy and Matter (CEEM)
4 --
5 -- Project: Belle-II
6 --
7 -- Author: Brandon Kunkler
8 --
9 -- Date: 07/23/2013
10 --
11 --*********************************************************************************
12 -- Description:
13 -- Deal with SFP status and control signals.
14 --
15 -- Deficiencies/Issues
16 --
17 --*********************************************************************************
18 library ieee;
19  use ieee.std_logic_1164.all;
20  use ieee.std_logic_misc.all;
21 
22 entity sfp_stat_ctrl is
23  generic(
24  NUM_GTS : integer := 2);
25  port(
26  clk : in std_logic;
27  txfault : in std_logic_vector(1 to NUM_GTS);
28  txdis : out std_logic_vector(1 to NUM_GTS);
29  mod2 : out std_logic_vector(1 to NUM_GTS);
30  mod1 : out std_logic_vector(1 to NUM_GTS);
31  mod0 : in std_logic_vector(1 to NUM_GTS);
32  los : in std_logic_vector(1 to NUM_GTS);
33  fault_flag : out std_logic;
34  mod_flag : out std_logic;
35  los_flag : out std_logic);
36 end sfp_stat_ctrl;
37 
38 
39 architecture behave of sfp_stat_ctrl is
40 
41 
42 
43 
44 begin
45 
46 ---------------------------------------------------------------------------------------------------------
47 -- Component instantiations
48 ---------------------------------------------------------------------------------------------------------
49 
50 
51 ---------------------------------------------------------------------------------------------------------
52 -- Concurrent statements
53 ---------------------------------------------------------------------------------------------------------
54  txdis <= (others => '0');
55  mod2 <= (others => '1');
56  mod1 <= (others => '1');
57 
58  -- Assertions ----------------------------------------------
59 
60  -----------------------------------------------------------
61 
62 ---------------------------------------------------------------------------------------------------------
63 -- Synchronous processes
64 ---------------------------------------------------------------------------------------------------------
65  --------------------------------------------------------------------------
66  -- Register the inputs and outputs to improve timing or adjust delays.
67  --------------------------------------------------------------------------
68  status_pcs : process(clk)
69  begin
70  if (clk'event and clk = '1') then
71  -- high is bad
72  fault_flag <= OR_REDUCE(txfault);
73  mod_flag <= OR_REDUCE(mod0);
74  los_flag <= OR_REDUCE(los);
75  end if;
76  end process;
77 
78 end behave;
79