clk_div Entity Reference

Inheritance diagram for clk_div:

Entities
beh	architecture

Libraries
IEEE
UNISIM

Use Clauses
STD_LOGIC_1164
numeric_std
std_logic_unsigned
vcomponents

Generics
RATIO	integer := 40

Ports
clk	in std_logic
rst	in std_logic
strb	in std_logic
clkdiv	out std_logic
hb	out std_logic
sync_strb	out std_logic

Detailed Description

Definition at line 11 of file clk_div.vhd.

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The documentation for this class was generated from the following file:

• klm_scint/source/clk_div.vhd