implementation Architecture Reference

Functions
std_logic	setsta ( sta: in std_logic rst: in std_logic sig: in std_logic )

Processes
proc_b2l	( b2lclk )
proc	( clock )

Signals
buf_btime	std_logic_vector ( 23 downto 0 ) := ( others = > ' 0 ' )
buf_etime	std_logic_vector ( 23 downto 0 ) := ( others = > ' 0 ' )
cnt_b2lwe	std_logic_vector ( 47 downto 0 ) := ( others = > ' 0 ' )
cnt_ftag	std_logic_vector ( 23 downto 0 ) := ( others = > ' 0 ' )
seq_seudet	std_logic_vector ( 1 downto 0 ) := ( others = > ' 0 ' )
cnt_seudet	std_logic_vector ( 9 downto 0 ) := ( others = > ' 0 ' )
seq_seuscan	std_logic_vector ( 1 downto 0 ) := ( others = > ' 0 ' )
cnt_seuscan	std_logic_vector ( 7 downto 0 ) := ( others = > ' 0 ' )
cnt_payload	std_logic_vector ( 7 downto 0 ) := ( others = > ' 0 ' )
sta_feeerr	std_logic_vector ( 7 downto 0 ) := ( others = > ' 0 ' )
sta_fifoerr	std_logic := ' 0 '
sta_tagerr	std_logic := ' 0 '
sta_timerr	std_logic := ' 0 '
sta_clkup	std_logic := ' 0 '
sta_ttup	std_logic := ' 0 '
sta_b2lup	std_logic := ' 0 '
sta_b2pll	std_logic := ' 0 '
sig_clklost	std_logic := ' 0 '
sig_ttlost	std_logic := ' 0 '
sig_b2llost	std_logic := ' 0 '
sig_plllost	std_logic := ' 0 '
sta_clklost	std_logic := ' 0 '
sta_ttlost	std_logic := ' 0 '
sta_b2llost	std_logic := ' 0 '
sta_plllost	std_logic := ' 0 '
sig_errreset	std_logic := ' 0 '
sta_anyerr	std_logic := ' 0 '
seq_anyerr	std_logic := ' 0 '
seq_ereg	std_logic := ' 0 '
seq_b2lwe	std_logic_vector ( 1 downto 0 ) := ( others = > ' 0 ' )
sta_clost	std_logic := ' 0 '
sta_terr	std_logic := ' 0 '
sta_rerr	std_logic := ' 0 '
sta_ebit	std_logic_vector ( 5 downto 0 ) := ( others = > ' 0 ' )
cnt_cklost	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
cnt_ttlost	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
cnt_lklost	std_logic_vector ( 2 downto 0 ) := ( others = > ' 0 ' )
sta_anybsy	std_logic := ' 0 '
buf_ereg	std_logic_vector ( 31 downto 0 ) := ( others = > ' 0 ' )
buf_payload	std_logic_vector ( 111 downto 0 ) := ( others = > ' 0 ' )

Aliases
rega	std_logic_vector ( 31 downto 0 ) is buf_payload ( 63 downto 32 )
regb	std_logic_vector ( 31 downto 0 ) is buf_payload ( 31 downto 0 )

Detailed Description

Definition at line 68 of file b2tt_payload.vhd.

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The documentation for this class was generated from the following file:

• b2tt/b2tt/b2tt_payload.vhd