implementation Architecture Reference

Functions
integer	aorb ( c: in std_logic a: in integer b: in integer )

Processes
PROCESS_173	( clock )

Constants
FMAX	integer := aorb ( SIM_SPEEDUP , 3 , FULLCOUNT )
IMAX	integer := FMAX- 1
CMAX	integer := aorb ( SIM_SPEEDUP , 7 , 19 )

Signals
seq_inc	std_logic_vector ( 1 downto 0 ) := " 00 "
sig_inc	std_logic := ' 0 '
clr_inc	std_logic := ' 0 '
clr_islip	std_logic := ' 0 '
sig_islip	std_logic := ' 0 '
cnt_islip	std_logic_vector ( 0 downto 0 ) := ( others = > ' 0 ' )
cnt_delay	std_logic_vector ( 7 downto 0 ) := ( others = > ' 0 ' )
sta_iddr	std_logic_vector ( 1 downto 0 ) := " 00 "
sta_ioctet	std_logic_vector ( IMAX downto 0 ) := ( others = > ' 0 ' )
sta_icrc8	std_logic_vector ( IMAX downto 0 ) := ( others = > ' 0 ' )
cnt_cycle	std_logic_vector ( CMAX downto 0 ) := ( others = > ' 0 ' )
cnt_iddr	std_logic_vector ( 9 downto 0 ) := ( others = > ' 0 ' )
sta_spos	std_logic_vector ( 9 downto 0 ) := ( others = > ' 1 ' )
sta_smax	std_logic_vector ( 9 downto 0 ) := ( others = > ' 0 ' )
sta_ezero	std_logic_vector ( 9 downto 0 ) := ( others = > ' 0 ' )
sta_lenmax	std_logic_vector ( 9 downto 0 ) := ( others = > ' 0 ' )
sta_lenhalf	std_logic_vector ( 9 downto 0 ) := ( others = > ' 0 ' )
sta_ibest	std_logic_vector ( 9 downto 0 ) := ( others = > ' 0 ' )
sta_iok	std_logic := ' 0 '
seq_iddr	std_logic_vector ( 1 downto 0 ) := ( others = > ' 0 ' )
cnt_dbg	std_logic_vector ( 5 downto 0 ) := ( others = > ' 0 ' )

Detailed Description

Definition at line 58 of file b2tt_iscan.vhd.

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The documentation for this class was generated from the following file:

• b2tt/b2tt/b2tt_iscan.vhd