Belle II KLM Scint Firmware  1
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implementation Architecture Reference

Functions

bunch_t   add_mod1280 ( a: in in bunch_t , b: in in bunch_t )
bunch_t   sub_mod1280 ( a: in in bunch_t , b: in in bunch_t )

Processes

proc  ( clock )

Subtypes

plus1_t  std_logic_vector ( 11 downto 0 )
bunch_t  std_logic_vector ( 10 downto 0 )
frame_t  std_logic_vector ( 9 downto 0 )

Signals

buf_ttpkt  std_logic_vector ( 11 downto 0 ) := ( others = > ' 0 ' )
buf_bdata  std_logic_vector ( 63 downto 0 ) := ( others = > ' 0 ' )
seq_kick  std_logic_vector ( 3 downto 0 ) := ( others = > ' 0 ' )
sig_kick  std_logic := ' 0 '
buf_kick  std_logic := ' 0 '
sig_injv  std_logic := ' 0 '
buf_begloc  std_logic_vector ( 10 downto 0 ) := ( others = > ' 0 ' )
buf_injloc  std_logic_vector ( 10 downto 0 ) := ( others = > ' 0 ' )
buf_endloc  std_logic_vector ( 10 downto 0 ) := ( others = > ' 0 ' )
buf_kicksub  std_logic_vector ( 10 downto 0 ) := ( others = > ' 0 ' )
buf_kickloc  std_logic_vector ( 10 downto 0 ) := ( others = > ' 0 ' )
buf_vpos  std_logic_vector ( 10 downto 0 ) := ( others = > ' 0 ' )
buf_vloc  std_logic_vector ( 10 downto 0 ) := ( others = > ' 0 ' )
buf_vpre  std_logic_vector ( 10 downto 0 ) := ( others = > ' 0 ' )
buf_vlen  std_logic_vector ( 10 downto 0 ) := ( others = > ' 0 ' )
buf_vfull  std_logic_vector ( 9 downto 0 ) := ( others = > ' 0 ' )
buf_vgate  std_logic_vector ( 9 downto 0 ) := ( others = > ' 0 ' )
cnt_frame  std_logic_vector ( 9 downto 0 ) := ( others = > ' 0 ' )
buf_state  std_logic_vector ( 1 downto 0 ) := ( others = > ' 0 ' )

Detailed Description

Definition at line 28 of file b2tt_injv.vhd.


The documentation for this class was generated from the following file: