Belle II KLM Scint Firmware  1
implementation Architecture Reference

Processes

proc  ( clock )

Signals

sta_frame  std_logic := ' 0 '
cnt_bit2  std_logic_vector ( 2 downto 0 ) := " 101 "
cnt_octet  std_logic_vector ( 3 downto 0 ) := " 0000 "
cnt_packet  std_logic_vector ( 7 downto 0 ) := x " 00 "

Detailed Description

Definition at line 40 of file b2tt_encode.vhd.


The documentation for this class was generated from the following file: