TX_LL Entity Reference

Inheritance diagram for TX_LL:

Entities
MAPPED	architecture

Libraries
IEEE

Use Clauses
STD_LOGIC_1164

Ports
TX_D	in std_logic_vector ( 0 to 15 )
TX_REM	in std_logic
TX_SRC_RDY_N	in std_logic
TX_SOF_N	in std_logic
TX_EOF_N	in std_logic
TX_DST_RDY_N	out std_logic
WARN_CC	in std_logic
DO_CC	in std_logic
CHANNEL_UP	in std_logic
GEN_SCP	out std_logic
GEN_ECP	out std_logic
TX_PE_DATA_V	out std_logic
GEN_PAD	out std_logic
TX_PE_DATA	out std_logic_vector ( 0 to 15 )
GEN_CC	out std_logic
USER_CLK	in std_logic

Detailed Description

Definition at line 63 of file tx_ll.vhd.

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The documentation for this class was generated from the following file:

• klm_aurora/source/tx_ll.vhd