Behavioral Architecture Reference

Processes
PROCESS_176	( clock )
PROCESS_177	( clock , reset )
PROCESS_178	( clkdiv2048 , reset )
PROCESS_179	( clock )

Constants
DevCode	std_logic_vector ( 3 downto 0 ) := " 1001 "
AddrBitA0T	std_logic_vector ( 2 downto 0 ) := " 000 "
AddrBitA1T	std_logic_vector ( 2 downto 0 ) := " 001 "
AddrBitA2T	std_logic_vector ( 2 downto 0 ) := " 010 "
AddrBitA3T	std_logic_vector ( 2 downto 0 ) := " 011 "
AddrBitA4T	std_logic_vector ( 2 downto 0 ) := " 100 "
AddrBitA5T	std_logic_vector ( 2 downto 0 ) := " 101 "
AddrBitA6T	std_logic_vector ( 2 downto 0 ) := " 110 "
AddrBitA7T	std_logic_vector ( 2 downto 0 ) := " 111 "
DeviceAddress	STD_LOGIC_VECTOR ( 6 DOWNTO 0 ) := DevCode& AddrBitA7T

Types
I2C_STATE_TYPE	( st_idle , st_start , st_read_byte , st_write_byte , st_wait_for_ack , st_send_ack , st_send_no_ack , st_stop )

Signals
dataToWrite	std_logic_vector ( 7 downto 0 ) := DeviceAddress& ' 1 '
dataToRead	std_logic_vector ( 7 downto 0 )
idxBit	unsigned ( 3 downto 0 )
idxCyc	unsigned ( 1 downto 0 )
readyForNextState	std_logic
readUpperByte	std_logic
clkCounter	unsigned ( 10 downto 0 )
clkdiv2048	std_logic
state	I2C_STATE_TYPE := st_idle
upperDataByte	std_logic_vector ( 7 downto 0 )
LowerDataByte	std_logic_vector ( 7 downto 0 )
i_runADC	std_logic

Detailed Description

Definition at line 68 of file Module_ADC_MCP3221_I2C_new.vhd.

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The documentation for this class was generated from the following file:

• peripherals/Module_ADC_MCP3221_I2C_new.vhd