Belle II KLM Scint Firmware  1
b2tt_revo.vhd
1 -- b2tt_revo.vhd
2 --
3 
4 library ieee;
5 use ieee.std_logic_1164.all;
6 use ieee.std_logic_unsigned.all;
7 use ieee.numeric_std.all;
8 library work;
9 use work.b2tt_symbols.all;
10 
11 entity b2tt_revo is
12  port (
13  clock : in std_logic;
14  cntpacket : in std_logic_vector (7 downto 0);
15  frameloc : in std_logic_vector (10 downto 0);
16  sigpayload : in std_logic;
17  payload : in std_logic_vector (76 downto 0);
18  revoloc : out std_logic_vector (10 downto 0);
19  revosig : out std_logic;
20  abortgap : out std_logic );
21 end b2tt_revo;
22 
23 architecture implementation of b2tt_revo is
24 
25  subtype plus1_t is std_logic_vector (11 downto 0);
26  subtype bunch_t is std_logic_vector (10 downto 0);
27  subtype frame_t is std_logic_vector (9 downto 0);
28  function add_mod1280
29  ( a: in bunch_t; b: in bunch_t ) return bunch_t is
30  variable aa : plus1_t;
31  variable bb : plus1_t;
32  variable cc : plus1_t;
33  begin
34  aa := '0' & a;
35  bb := '0' & b;
36  cc := aa + bb;
37  if cc >= 1280 then
38  cc := cc - 1280;
39  end if;
40  return cc(10 downto 0);
41  end function add_mod1280;
42 
43  signal buf_ttpkt : std_logic_vector (11 downto 0) := (others => '0');
44  signal buf_bdata : std_logic_vector (63 downto 0) := (others => '0');
45 
46  signal buf_beggap : std_logic_vector (10 downto 0) := (others => '0');
47  signal buf_endgap : std_logic_vector (10 downto 0) := (others => '0');
48  signal sig_gap : std_logic := '0';
49  signal sig_revo : std_logic := '0';
50  signal buf_revoloc : std_logic_vector (10 downto 0) := (others => '0');
51  signal buf_revosav : std_logic_vector (10 downto 0) := (others => '0');
52 begin
53 
54  -- in
55  buf_ttpkt <= payload(75 downto 64);
56  buf_bdata <= payload(63 downto 0);
57 
58  -- proc
59  proc: process(clock)
60  begin
61  if rising_edge(clock) then
62  -- start seq_kick
63  if sigpayload = '1' and cntpacket = 13 then
64  if buf_ttpkt = TTPKT_REVO then
65  buf_revoloc <= buf_bdata(10 downto 0);
66  buf_beggap <= add_mod1280(buf_bdata(22 downto 12),
67  buf_bdata(10 downto 0));
68  buf_endgap <= add_mod1280(buf_bdata(34 downto 24),
69  buf_bdata(10 downto 0));
70  else
71  buf_revoloc <= (others => '0');
72  buf_beggap <= (others => '0');
73  buf_endgap <= (others => '0');
74  end if;
75  end if;
76 
77  -- sig_revo
78  if frameloc = buf_revoloc and buf_revoloc = buf_revosav then
79  sig_revo <= '1';
80  else
81  sig_revo <= '0';
82  end if;
83 
84  -- buf_revosav
85  if frameloc = buf_revoloc then
86  buf_revosav <= buf_revoloc;
87  end if;
88 
89  -- sig_gap
90  if frameloc = buf_endgap then
91  sig_gap <= '0';
92  elsif frameloc = buf_beggap then
93  sig_gap <= '1';
94  end if;
95 
96  end if;
97  end process;
98 
99  -- out
100  revoloc <= buf_revosav;
101  revosig <= sig_revo;
102  abortgap <= sig_gap;
103 
104 end implementation;