--lpm_mux CASCADE_CHAIN="MANUAL" DEVICE_FAMILY="Stratix IV" IGNORE_CASCADE_BUFFERS="OFF" LPM_SIZE=2 LPM_WIDTH=17 LPM_WIDTHS=1 data result sel
--VERSION_BEGIN 10.1SP1 cbx_lpm_mux 2011:01:19:22:08:07:SJ cbx_mgl 2011:01:19:22:15:52:SJ  VERSION_END


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--synthesis_resources = lut 6 
SUBDESIGN mux_rpc
( 
	data[33..0]	:	input;
	result[16..0]	:	output;
	sel[0..0]	:	input;
) 
VARIABLE
	l1_w0_n0_mux_dataout	:	WIRE;
	l1_w10_n0_mux_dataout	:	WIRE;
	l1_w11_n0_mux_dataout	:	WIRE;
	l1_w12_n0_mux_dataout	:	WIRE;
	l1_w13_n0_mux_dataout	:	WIRE;
	l1_w14_n0_mux_dataout	:	WIRE;
	l1_w15_n0_mux_dataout	:	WIRE;
	l1_w16_n0_mux_dataout	:	WIRE;
	l1_w1_n0_mux_dataout	:	WIRE;
	l1_w2_n0_mux_dataout	:	WIRE;
	l1_w3_n0_mux_dataout	:	WIRE;
	l1_w4_n0_mux_dataout	:	WIRE;
	l1_w5_n0_mux_dataout	:	WIRE;
	l1_w6_n0_mux_dataout	:	WIRE;
	l1_w7_n0_mux_dataout	:	WIRE;
	l1_w8_n0_mux_dataout	:	WIRE;
	l1_w9_n0_mux_dataout	:	WIRE;
	data_wire[33..0]	: WIRE;
	result_wire_ext[16..0]	: WIRE;
	sel_wire[0..0]	: WIRE;

BEGIN 
	l1_w0_n0_mux_dataout = sel_wire[0..0] & data_wire[17..17] # !(sel_wire[0..0]) & data_wire[0..0];
	l1_w10_n0_mux_dataout = sel_wire[0..0] & data_wire[27..27] # !(sel_wire[0..0]) & data_wire[10..10];
	l1_w11_n0_mux_dataout = sel_wire[0..0] & data_wire[28..28] # !(sel_wire[0..0]) & data_wire[11..11];
	l1_w12_n0_mux_dataout = sel_wire[0..0] & data_wire[29..29] # !(sel_wire[0..0]) & data_wire[12..12];
	l1_w13_n0_mux_dataout = sel_wire[0..0] & data_wire[30..30] # !(sel_wire[0..0]) & data_wire[13..13];
	l1_w14_n0_mux_dataout = sel_wire[0..0] & data_wire[31..31] # !(sel_wire[0..0]) & data_wire[14..14];
	l1_w15_n0_mux_dataout = sel_wire[0..0] & data_wire[32..32] # !(sel_wire[0..0]) & data_wire[15..15];
	l1_w16_n0_mux_dataout = sel_wire[0..0] & data_wire[33..33] # !(sel_wire[0..0]) & data_wire[16..16];
	l1_w1_n0_mux_dataout = sel_wire[0..0] & data_wire[18..18] # !(sel_wire[0..0]) & data_wire[1..1];
	l1_w2_n0_mux_dataout = sel_wire[0..0] & data_wire[19..19] # !(sel_wire[0..0]) & data_wire[2..2];
	l1_w3_n0_mux_dataout = sel_wire[0..0] & data_wire[20..20] # !(sel_wire[0..0]) & data_wire[3..3];
	l1_w4_n0_mux_dataout = sel_wire[0..0] & data_wire[21..21] # !(sel_wire[0..0]) & data_wire[4..4];
	l1_w5_n0_mux_dataout = sel_wire[0..0] & data_wire[22..22] # !(sel_wire[0..0]) & data_wire[5..5];
	l1_w6_n0_mux_dataout = sel_wire[0..0] & data_wire[23..23] # !(sel_wire[0..0]) & data_wire[6..6];
	l1_w7_n0_mux_dataout = sel_wire[0..0] & data_wire[24..24] # !(sel_wire[0..0]) & data_wire[7..7];
	l1_w8_n0_mux_dataout = sel_wire[0..0] & data_wire[25..25] # !(sel_wire[0..0]) & data_wire[8..8];
	l1_w9_n0_mux_dataout = sel_wire[0..0] & data_wire[26..26] # !(sel_wire[0..0]) & data_wire[9..9];
	data_wire[] = ( data[]);
	result[] = result_wire_ext[];
	result_wire_ext[] = ( l1_w16_n0_mux_dataout, l1_w15_n0_mux_dataout, l1_w14_n0_mux_dataout, l1_w13_n0_mux_dataout, l1_w12_n0_mux_dataout, l1_w11_n0_mux_dataout, l1_w10_n0_mux_dataout, l1_w9_n0_mux_dataout, l1_w8_n0_mux_dataout, l1_w7_n0_mux_dataout, l1_w6_n0_mux_dataout, l1_w5_n0_mux_dataout, l1_w4_n0_mux_dataout, l1_w3_n0_mux_dataout, l1_w2_n0_mux_dataout, l1_w1_n0_mux_dataout, l1_w0_n0_mux_dataout);
	sel_wire[] = ( sel[0..0]);
END;
--VALID FILE
