--lpm_counter CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" DEVICE_FAMILY="Stratix IV" lpm_modulus=39 lpm_port_updown="PORT_CONNECTIVITY" lpm_width=6 clock q sclr CARRY_CHAIN="MANUAL" CARRY_CHAIN_LENGTH=48
--VERSION_BEGIN 10.1SP1 cbx_cycloneii 2011:01:19:22:08:06:SJ cbx_lpm_add_sub 2011:01:19:22:08:06:SJ cbx_lpm_compare 2011:01:19:22:08:07:SJ cbx_lpm_counter 2011:01:19:22:08:07:SJ cbx_lpm_decode 2011:01:19:22:08:07:SJ cbx_mgl 2011:01:19:22:15:52:SJ cbx_stratix 2011:01:19:22:08:08:SJ cbx_stratixii 2011:01:19:22:08:08:SJ  VERSION_END


-- Copyright (C) 1991-2011 Altera Corporation
--  Your use of Altera Corporation's design tools, logic functions 
--  and other software and tools, and its AMPP partner logic 
--  functions, and any output files from any of the foregoing 
--  (including device programming or simulation files), and any 
--  associated documentation or information are expressly subject 
--  to the terms and conditions of the Altera Program License 
--  Subscription Agreement, Altera MegaCore Function License 
--  Agreement, or other applicable license agreement, including, 
--  without limitation, that your use is for the sole purpose of 
--  programming logic devices manufactured by Altera and sold by 
--  Altera or its authorized distributors.  Please refer to the 
--  applicable agreement for further details.


FUNCTION cmpr_pdc (dataa[5..0], datab[5..0])
RETURNS ( aeb);
FUNCTION stratixiv_lcell_comb (cin, dataa, datab, datac, datad, datae, dataf, datag, sharein)
WITH ( DONT_TOUCH, EXTENDED_LUT, LUT_MASK, SHARED_ARITH)
RETURNS ( combout, cout, shareout, sumout);

--synthesis_resources = lut 6 reg 6 
SUBDESIGN cntr_sdi
( 
	clock	:	input;
	q[5..0]	:	output;
	sclr	:	input;
) 
VARIABLE 
	counter_reg_bit[5..0] : dffeas;
	cmpr1 : cmpr_pdc;
	counter_comb_bita0 : stratixiv_lcell_comb
		WITH (
			EXTENDED_LUT = "off",
			LUT_MASK = "000000000000FF00",
			SHARED_ARITH = "off"
		);
	counter_comb_bita1 : stratixiv_lcell_comb
		WITH (
			EXTENDED_LUT = "off",
			LUT_MASK = "0000FF000000FF00",
			SHARED_ARITH = "off"
		);
	counter_comb_bita2 : stratixiv_lcell_comb
		WITH (
			EXTENDED_LUT = "off",
			LUT_MASK = "0000FF000000FF00",
			SHARED_ARITH = "off"
		);
	counter_comb_bita3 : stratixiv_lcell_comb
		WITH (
			EXTENDED_LUT = "off",
			LUT_MASK = "0000FF000000FF00",
			SHARED_ARITH = "off"
		);
	counter_comb_bita4 : stratixiv_lcell_comb
		WITH (
			EXTENDED_LUT = "off",
			LUT_MASK = "0000FF000000FF00",
			SHARED_ARITH = "off"
		);
	counter_comb_bita5 : stratixiv_lcell_comb
		WITH (
			EXTENDED_LUT = "off",
			LUT_MASK = "0000FF000000FF00",
			SHARED_ARITH = "off"
		);
	aclr_actual	: WIRE;
	clk_en	: NODE;
	cnt_en	: NODE;
	compare_result	: WIRE;
	cout_actual	: WIRE;
	data[5..0]	: NODE;
	external_cin	: WIRE;
	lsb_cin	: WIRE;
	modulus_bus[5..0]	: WIRE;
	modulus_trigger	: WIRE;
	s_val[5..0]	: WIRE;
	safe_q[5..0]	: WIRE;
	sload	: NODE;
	sset	: NODE;
	time_to_clear	: WIRE;
	updown_dir	: WIRE;
	updown_lsb	: WIRE;
	updown_other_bits	: WIRE;

BEGIN 
	counter_reg_bit[].asdata = ((sset & s_val[]) # ((! sset) & ((sload & data[]) # (((! sload) & modulus_bus[]) & (! updown_dir)))));
	counter_reg_bit[].clk = clock;
	counter_reg_bit[].clrn = (! aclr_actual);
	counter_reg_bit[].d = ( counter_comb_bita[5..0].sumout);
	counter_reg_bit[].ena = (clk_en & (((cnt_en # sclr) # sset) # sload));
	counter_reg_bit[].sclr = sclr;
	counter_reg_bit[].sload = ((sset # sload) # modulus_trigger);
	cmpr1.dataa[] = safe_q[];
	cmpr1.datab[] = modulus_bus[];
	counter_comb_bita[5..0].cin = ( counter_comb_bita[4..0].cout, lsb_cin);
	counter_comb_bita[5..0].datad = ( counter_reg_bit[5..0].q);
	counter_comb_bita[5..0].dataf = ( updown_other_bits, updown_other_bits, updown_other_bits, updown_other_bits, updown_other_bits, updown_lsb);
	aclr_actual = B"0";
	clk_en = VCC;
	cnt_en = VCC;
	compare_result = cmpr1.aeb;
	cout_actual = (((! counter_comb_bita[5].cout) $ updown_other_bits) # (time_to_clear & updown_dir));
	data[] = GND;
	external_cin = B"1";
	lsb_cin = B"0";
	modulus_bus[] = B"100110";
	modulus_trigger = cout_actual;
	q[] = safe_q[];
	s_val[] = B"111111";
	safe_q[] = counter_reg_bit[].q;
	sload = GND;
	sset = GND;
	time_to_clear = compare_result;
	updown_dir = B"1";
	updown_lsb = updown_dir;
	updown_other_bits = ((! external_cin) # updown_dir);
END;
--VALID FILE
