{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0 -1}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "TimeQuest Timing Analyzer Quartus II 64-Bit " "Info: Running Quartus II 64-Bit TimeQuest Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 10.1 Build 197 01/19/2011 Service Pack 1 SJ Full Version " "Info: Version 10.1 Build 197 01/19/2011 Service Pack 1 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_START_BANNER_TIME" "Fri Sep 16 11:29:05 2011 " "Info: Processing started: Fri Sep 16 11:29:05 2011" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0 -1}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 -1}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sta aurora_8b10b_v5_2_example_design -c aurora_8b10b_v5_2_example_design " "Info: Command: quartus_sta aurora_8b10b_v5_2_example_design -c aurora_8b10b_v5_2_example_design" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0 -1}
{ "Info" "0" "" "Info: qsta_default_script.tcl version: #4" {  } {  } 0 0 "qsta_default_script.tcl version: #4" 0 0 "" 0 -1}
{ "Info" "IQCU_PARALLEL_AUTODETECT_MULTIPLE_PROCESSORS" "2 2 " "Info: Parallel compilation is enabled and will use 2 of the 2 processors detected" {  } {  } 0 0 "Parallel compilation is enabled and will use %1!i! of the %2!i! processors detected" 0 0 "" 0 -1}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Info: Low junction temperature is 0 degrees C" {  } {  } 0 0 "%1!s! is %2!s!" 0 0 "" 0 -1}
{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "Info: High junction temperature is 85 degrees C" {  } {  } 0 0 "%1!s! is %2!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_SDC_STATEMENT_PARENT" "" "Info: Evaluating HDL-embedded SDC commands" { { "Info" "ISTA_SDC_STATEMENT_ENTITY" "sld_hub " "Info: Entity sld_hub" { { "Info" "ISTA_SDC_STATEMENT_EVAL" "create_clock -period 10MHz -name altera_reserved_tck \[get_ports \{altera_reserved_tck\}\] " "Info: create_clock -period 10MHz -name altera_reserved_tck \[get_ports \{altera_reserved_tck\}\]" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_SDC_STATEMENT_EVAL" "set_clock_groups -asynchronous -group \{altera_reserved_tck\} " "Info: set_clock_groups -asynchronous -group \{altera_reserved_tck\}" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Entity %1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Evaluating HDL-embedded SDC commands" 0 0 "" 0 -1}
{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "aurora_8b10b_v5_2_example_design.sdc " "Critical Warning: Synopsys Design Constraints File file not found: 'aurora_8b10b_v5_2_example_design.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." {  } {  } 1 0 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "" 0 -1}
{ "Warning" "WSTA_NODE_FOUND_WITHOUT_CLOCK_ASSIGNMENT" "aurora_8b10b_v5_2:aurora_module_i\|MGT_alt4gxb:MGT_0\|tx_coreclk_in\[0\]~clkctrlFMAX_CAP_FF " "Warning: Node: aurora_8b10b_v5_2:aurora_module_i\|MGT_alt4gxb:MGT_0\|tx_coreclk_in\[0\]~clkctrlFMAX_CAP_FF was determined to be a clock but was found without an associated clock assignment." {  } {  } 0 0 "Node: %1!s! was determined to be a clock but was found without an associated clock assignment." 0 0 "" 0 -1}
{ "Warning" "WSTA_NODE_FOUND_WITHOUT_CLOCK_ASSIGNMENT" "INIT_CLK " "Warning: Node: INIT_CLK was determined to be a clock but was found without an associated clock assignment." {  } {  } 0 0 "Node: %1!s! was determined to be a clock but was found without an associated clock assignment." 0 0 "" 0 -1}
{ "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "Info: No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" {  } {  } 0 0 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty " "Info: Deriving Clock Uncertainty" { { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}
{ "Warning" "WSTA_GENERIC_WARNING" "PLL cross checking found inconsistent PLL clock settings: " "Warning: PLL cross checking found inconsistent PLL clock settings:" { { "Warning" "WSTA_GENERIC_WARNING" "Node: aurora_module_i\|MGT_0\|tx_pll0\|clk\[0\] was found missing 1 generated clock that corresponds to a base clock with a period of: 0.640 " "Warning: Node: aurora_module_i\|MGT_0\|tx_pll0\|clk\[0\] was found missing 1 generated clock that corresponds to a base clock with a period of: 0.640" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Warning" "WSTA_GENERIC_WARNING" "Node: aurora_module_i\|MGT_0\|rx_cdr_pll0\|clk\[0\] was found missing 1 generated clock that corresponds to a base clock with a period of: 0.640 " "Warning: Node: aurora_module_i\|MGT_0\|rx_cdr_pll0\|clk\[0\] was found missing 1 generated clock that corresponds to a base clock with a period of: 0.640" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}
{ "Info" "0" "" "Info: Analyzing Slow 900mV 85C Model" {  } {  } 0 0 "Analyzing Slow 900mV 85C Model" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "setup 47.669 " "Info: Worst-case setup slack is 47.669" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   47.669         0.000 altera_reserved_tck  " "Info:    47.669         0.000 altera_reserved_tck " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.263 " "Info: Worst-case hold slack is 0.263" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.263         0.000 altera_reserved_tck  " "Info:     0.263         0.000 altera_reserved_tck " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "recovery 48.829 " "Info: Worst-case recovery slack is 48.829" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   48.829         0.000 altera_reserved_tck  " "Info:    48.829         0.000 altera_reserved_tck " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "removal 0.489 " "Info: Worst-case removal slack is 0.489" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.489         0.000 altera_reserved_tck  " "Info:     0.489         0.000 altera_reserved_tck " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width 49.308 " "Info: Worst-case minimum pulse width slack is 49.308" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   49.308         0.000 altera_reserved_tck  " "Info:    49.308         0.000 altera_reserved_tck " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "0" "" "Info: Analyzing Slow 900mV 0C Model" {  } {  } 0 0 "Analyzing Slow 900mV 0C Model" 0 0 "" 0 -1}
{ "Info" "ITAPI_TAPI_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0 0 "Started post-fitting delay annotation" 0 0 "" 0 -1}
{ "Info" "ITAPI_TAPI_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0 "" 0 -1}
{ "Warning" "WSTA_NODE_FOUND_WITHOUT_CLOCK_ASSIGNMENT" "aurora_8b10b_v5_2:aurora_module_i\|MGT_alt4gxb:MGT_0\|tx_coreclk_in\[0\]~clkctrlFMAX_CAP_FF " "Warning: Node: aurora_8b10b_v5_2:aurora_module_i\|MGT_alt4gxb:MGT_0\|tx_coreclk_in\[0\]~clkctrlFMAX_CAP_FF was determined to be a clock but was found without an associated clock assignment." {  } {  } 0 0 "Node: %1!s! was determined to be a clock but was found without an associated clock assignment." 0 0 "" 0 -1}
{ "Warning" "WSTA_NODE_FOUND_WITHOUT_CLOCK_ASSIGNMENT" "INIT_CLK " "Warning: Node: INIT_CLK was determined to be a clock but was found without an associated clock assignment." {  } {  } 0 0 "Node: %1!s! was determined to be a clock but was found without an associated clock assignment." 0 0 "" 0 -1}
{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty " "Info: Deriving Clock Uncertainty" { { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}
{ "Warning" "WSTA_GENERIC_WARNING" "PLL cross checking found inconsistent PLL clock settings: " "Warning: PLL cross checking found inconsistent PLL clock settings:" { { "Warning" "WSTA_GENERIC_WARNING" "Node: aurora_module_i\|MGT_0\|tx_pll0\|clk\[0\] was found missing 1 generated clock that corresponds to a base clock with a period of: 0.640 " "Warning: Node: aurora_module_i\|MGT_0\|tx_pll0\|clk\[0\] was found missing 1 generated clock that corresponds to a base clock with a period of: 0.640" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Warning" "WSTA_GENERIC_WARNING" "Node: aurora_module_i\|MGT_0\|rx_cdr_pll0\|clk\[0\] was found missing 1 generated clock that corresponds to a base clock with a period of: 0.640 " "Warning: Node: aurora_module_i\|MGT_0\|rx_cdr_pll0\|clk\[0\] was found missing 1 generated clock that corresponds to a base clock with a period of: 0.640" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "setup 47.703 " "Info: Worst-case setup slack is 47.703" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   47.703         0.000 altera_reserved_tck  " "Info:    47.703         0.000 altera_reserved_tck " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.255 " "Info: Worst-case hold slack is 0.255" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.255         0.000 altera_reserved_tck  " "Info:     0.255         0.000 altera_reserved_tck " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "recovery 48.822 " "Info: Worst-case recovery slack is 48.822" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   48.822         0.000 altera_reserved_tck  " "Info:    48.822         0.000 altera_reserved_tck " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "removal 0.473 " "Info: Worst-case removal slack is 0.473" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.473         0.000 altera_reserved_tck  " "Info:     0.473         0.000 altera_reserved_tck " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width 49.265 " "Info: Worst-case minimum pulse width slack is 49.265" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   49.265         0.000 altera_reserved_tck  " "Info:    49.265         0.000 altera_reserved_tck " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "0" "" "Info: Analyzing Fast 900mV 0C Model" {  } {  } 0 0 "Analyzing Fast 900mV 0C Model" 0 0 "" 0 -1}
{ "Info" "ITAPI_TAPI_STARTED" "" "Info: Started post-fitting delay annotation" {  } {  } 0 0 "Started post-fitting delay annotation" 0 0 "" 0 -1}
{ "Info" "ITAPI_TAPI_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0 "" 0 -1}
{ "Warning" "WSTA_NODE_FOUND_WITHOUT_CLOCK_ASSIGNMENT" "aurora_8b10b_v5_2:aurora_module_i\|MGT_alt4gxb:MGT_0\|tx_coreclk_in\[0\]~clkctrlFMAX_CAP_FF " "Warning: Node: aurora_8b10b_v5_2:aurora_module_i\|MGT_alt4gxb:MGT_0\|tx_coreclk_in\[0\]~clkctrlFMAX_CAP_FF was determined to be a clock but was found without an associated clock assignment." {  } {  } 0 0 "Node: %1!s! was determined to be a clock but was found without an associated clock assignment." 0 0 "" 0 -1}
{ "Warning" "WSTA_NODE_FOUND_WITHOUT_CLOCK_ASSIGNMENT" "INIT_CLK " "Warning: Node: INIT_CLK was determined to be a clock but was found without an associated clock assignment." {  } {  } 0 0 "Node: %1!s! was determined to be a clock but was found without an associated clock assignment." 0 0 "" 0 -1}
{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty " "Info: Deriving Clock Uncertainty" { { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -setup 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020 " "Info: set_clock_uncertainty -rise_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -rise_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020 " "Info: set_clock_uncertainty -fall_from \[get_clocks \{altera_reserved_tck\}\] -fall_to \[get_clocks \{altera_reserved_tck\}\] -hold 0.020" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}
{ "Warning" "WSTA_GENERIC_WARNING" "PLL cross checking found inconsistent PLL clock settings: " "Warning: PLL cross checking found inconsistent PLL clock settings:" { { "Warning" "WSTA_GENERIC_WARNING" "Node: aurora_module_i\|MGT_0\|tx_pll0\|clk\[0\] was found missing 1 generated clock that corresponds to a base clock with a period of: 0.640 " "Warning: Node: aurora_module_i\|MGT_0\|tx_pll0\|clk\[0\] was found missing 1 generated clock that corresponds to a base clock with a period of: 0.640" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Warning" "WSTA_GENERIC_WARNING" "Node: aurora_module_i\|MGT_0\|rx_cdr_pll0\|clk\[0\] was found missing 1 generated clock that corresponds to a base clock with a period of: 0.640 " "Warning: Node: aurora_module_i\|MGT_0\|rx_cdr_pll0\|clk\[0\] was found missing 1 generated clock that corresponds to a base clock with a period of: 0.640" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "setup 48.920 " "Info: Worst-case setup slack is 48.920" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   48.920         0.000 altera_reserved_tck  " "Info:    48.920         0.000 altera_reserved_tck " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.144 " "Info: Worst-case hold slack is 0.144" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.144         0.000 altera_reserved_tck  " "Info:     0.144         0.000 altera_reserved_tck " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "recovery 49.590 " "Info: Worst-case recovery slack is 49.590" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   49.590         0.000 altera_reserved_tck  " "Info:    49.590         0.000 altera_reserved_tck " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "removal 0.275 " "Info: Worst-case removal slack is 0.275" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    0.275         0.000 altera_reserved_tck  " "Info:     0.275         0.000 altera_reserved_tck " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width 49.131 " "Info: Worst-case minimum pulse width slack is 49.131" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "    Slack End Point TNS Clock  " "Info:     Slack End Point TNS Clock " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= ============= ===================== " "Info: ========= ============= =====================" {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "   49.131         0.000 altera_reserved_tck  " "Info:    49.131         0.000 altera_reserved_tck " {  } {  } 0 0 "%1!s!" 0 0 "" 0 -1}  } {  } 0 0 "Worst-case %1!s! slack is %2!s!" 0 0 "" 0 -1}
{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "setup " "Info: Design is not fully constrained for setup requirements" {  } {  } 0 0 "Design is not fully constrained for %1!s! requirements" 0 0 "" 0 -1}
{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "hold " "Info: Design is not fully constrained for hold requirements" {  } {  } 0 0 "Design is not fully constrained for %1!s! requirements" 0 0 "" 0 -1}
{ "Info" "IQEXE_ERROR_COUNT" "TimeQuest Timing Analyzer 0 s 16 s Quartus II 64-Bit " "Info: Quartus II 64-Bit TimeQuest Timing Analyzer was successful. 0 errors, 16 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "608 " "Info: Peak virtual memory: 608 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 -1} { "Info" "IQEXE_END_BANNER_TIME" "Fri Sep 16 11:29:41 2011 " "Info: Processing ended: Fri Sep 16 11:29:41 2011" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_TIME" "00:00:36 " "Info: Elapsed time: 00:00:36" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 -1} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:19 " "Info: Total CPU time (on all processors): 00:00:19" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 -1}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 -1}
