focusing DIRC (local) fDIRC Meeting page
Aston, Kurtis Nishimura, Jerry Va'vra
UH: Matt Andrew, Xiaowen Shi, Gary Varner
Next meeting awaiting update from Kurtis on new
firmware release results. (13-JAN-2013)
Call-in: (866) 740-1260
Meeting (11:30am HST, 1:30pm PST) [30 minutes later
than originally planned]:
- Long-term SLAC plan
- Long-term Hawaii commitment
- Why do we only have 40% of events
with IRS2 data and what shall we do about it?
- Issues with 90 degree
- When will have complete system,
with all IRS-2 packages?
- French activities on fDIRC?
- iTOP test(s) at SLAC ?
documentation (updated 16-OCT-2012):
- Photograph of g-10 capture bar
- Reminder figure -- g-10 support
bar mechanics [png]
- Diagrams from Matt A showing the
board-stack sizes [png]
- Link to slides on speaking between
Altera and Xilinx over Gbps fiber links [PDF]
- Design link for H8500 "front"
- Earlier version of the fDIRC
detector frame: [PDF]
Information from Taiwan colleagues
on Altera to Aurora connection:
- Overview diagram [jpg]
- rar archive of the V6aurora [rar]
Meeting (2pm HST, 5pm PDT):
Preparations for scanning set-up
Updated documentation below.
- More detailed scheduling plans
- Coordination with Fabio's visit
- H8500 interface board [documentation
posted below] (David/Matt)
- Progress toward NIM paper (Jerry)
- Specific questions list [txt]
Touching base -- behind schedule on
getting next board stack together. Schedule first modules
delivery once get back from iTOP cosmic ray test.
Drawings sent: [version
- When to visit SLAC for laser scan
- Production/delivery schedule
Meeting Action Items:
- There are 2 classes of H8500 tubes: 1kV -->
1.1x10^6 gain, 1.1kV --> 2-3x10^6.
- According to the HPK data sheet, the divider current is
about 173uA at 1.1kV. (so Jerry thinking to gang 3x
together from Bertan HV supply)
- Jerry will request quote for additional H8500
Send H8500 tube in Hawaii back
In return, Jerry will send one of the new, tested H8500
for integration tests in Hawaii
First priority will be to get scanning system module
readout working first, which entails
- Gary will forward this quote, to try and get PNNL to
fDIRC fBlock to SLAC by July, assy in August
Final module mechanics to be sent to SLAC when available
Items to resolve for deploying full complement of BLAB3A
board stacks in CRT:
- Designing and fab appropriate Front card
- Additional cards (SCROD, interconnect, L1-L4, BLAB3A
ASIC) dedicated to fDIRC
- Qualify performance with H8500 tube
- Power supply for SCROD modules
- Brackets and cabling mechanics
Here are a number of links [main directory] to papers relevant to f-DIRC:
[SLAC-PUB-12236] [SLAC-PUB-13464] [SLAC-PUB-13763] [SLAC-PUB-14282]
Drawings from Jerry:
- Previously proposed image plane scheme: [pdf]
- New scheme to accommodate later arrival of Wavecatcher
- New H8500 connector & pin mapping: [pdf]
Discussion points/questions from Jerry:
- Can BLAB3 electronics package fit within H8500 profile?
- Older version of H8500 tube is in Hawaii, send back to
- Plans to provide realistic BLAB3 package for scanning
- Fiberoptics still needed at new setup?
- Fiberoptics are still required, 1 per electronics
package, which services 2 H8500 PMTs.
Image plane concept drawing from Jerry, with BLAB3 module superimposed: [PDF]
Clarification on module width: the boards are 100mm in the direction shown,
and the width will be determined by the thickness of the aluminum side plates
(which also serves as a heatsink) and the depth of the slots. However, the
clear boundary condition is to meet the H8500 [PDF] 104mm + spacer (1-2mm?) between tubes?
Of course for this first configuration, could be wider, though it would be better
to keep the footprint small enough that it can continued to be used later, when a
full matrix is packed together.
Gary will be in transit and cannot make meeting. Kurtis will post an agenda/slides?
Summary figure from discussion last week: [PDF]
- Summary of number hits in new data?
- Processing status?
There will be a meeting to discuss options for a new PMT/readout holder on image plane.
Meeting link: [link]
Reference (Motherboard) figures [fig1] [fig2] [fig3]
A view to the future:
block ready to be turned into fDIRC expansion block.
Dial-in information: (866) 740-1260 (toll free USA)
Access code: 8147808 (followed by "#")
Note added (22-DEC-2010): expect fDIRC quartz block to start machining in mid-Jan,
with 4 months machining + polishing estimate. First run possibly from mid-May, 2011.
Post Cal-tech, pre-Christmas meeting:
- CRT analysis update (Jerry) [PDF]
- Comparison plots (Jerry)
- Discussion on plans for
BLAB2 (with new firmware) analysis (lead by Kurtis)
- Discussion of CRT BLAB3A
commissioning strategy (all)
- Schedule and discussion of
plans for laser scan set-up (lead by Jerry)
Information on the fiber readout system:
- Schematic for an example board [posted
here] are available as well)
- Here is an interesting
study of using Aurora to communicate between Xilinx and
- An update on the next
generation Hawaii board stack [PDF]
- Various BOMs:
DSP_cPCI BOM [xls]
and mTC variant [xls]
- Baseline fiber
components: Avago part
- Plans/scheduling [Update on BLAB3-based readout] (all)
- Constraints from Jerry
- 24-tube array readout plane:
- Possible array figure [PDF]
- Updates from Europe? (Jerry)
- Current plans for deployment? (all)
- AOB (?)
- Larry's Masters'
Thesis (local copy)
- Cosmic Ray Test stand (CRT) published reference [SLAC-PUB-13873]
- Reports on progress
- Larry Exp 2 update
- TIPP 2009 fDIRC paper
- Design reference files?
Return to scheduling page
[UH Physics] [University of Hawaii]
1/13/2013 -- GSV