From harmon@lightspintech.com Sat Feb 26 08:05:13 2011 Date: Sat, 26 Feb 2011 13:04:58 -0500 From: Eric S. Harmon To: Gary S. Varner Cc: Andrew Wong , Matt Andrew Subject: Re: phone meeting on status of LARC readout Gary, We have tested the following: 1. All of the power supplies, voltage regulators, etc. -- all seem to be correct. 2. The LARC ASICs all seem to be working correctly and give different results to different values of dc operating points. 3. The laptop seems to communicate with the EZ-USB chip, and data seems to flow back and forth. 4. The clock signals seem to be correct 5. There does seem to be data flowing between the LARC ASICs and the FPGA, and between the FPGA and the EZ-USB 6. We have checked the firmware on the EEPROM, and it matches the file from the web page. 7. We have tried two computer software programs on the laptop: i. The LARC histogram program -- compiled and seems to work. However, we only see new data on the first acquisition -- subsequent acquisitions results in exact copies of the first data acquisition. We have also only seen what appears to be real data (applying a dc bias to one of the LARC ASIC inputs) a couple of times -- otherwise, the data seems random. ii. The USB test program from Andrew seems to communicate with the EZ-USB, the the resulting data is suspicious (it consists of an increasing series of hex values, incrementing by 2 for each value, with no evidence of the header (1234?). Also, the sequence does not start at 0, but rather starts at about 30, 32, 34 ... and then wraps around to 0, 2, 4 .. at the end. One option might be for us to send the motherboard back to you guys and see if it starts working again with your power supply & computer. We could also ship the laptop, and we could see if that is the problem. One concern I have is that one of the chips is blown -- particularly the EZ-USB and/or the FPGA. Eric On 2/25/2011 6:43 PM, Gary S. Varner wrote: > > Hi all, > > OK, let's plan to meet at 11am HST to discuss the strategy and current > status. > > We will be on speakerphone at (808) 956-2920. > > Eric, could you please prepare a short summary of what has been tested, > and those results? > > For instance, has a version of the firmware with dummy data to validate > throughput been tried? > > I'm very concerned that Andrew does not have the resources (esp. firmware > expertise) needed to debug efficiently, and we are very stretched on > manpower, with many project deliverables badly behind schedule, that > precludes bringing more manpower to bear. > > Cheers, > Gary > > On Fri, 25 Feb 2011, Eric S. Harmon wrote: > > > Hi Gary and Andrew, > > > > I'm available any time on Monday. It appears that 11:00 AM (Hawaii > > time) will work. If that does not work out for you guys, perhaps a > > little later in the day? > > > > Thanks, > > > > Eric > > > > On 2/24/2011 5:39 PM, Andrew Wong wrote: > > > Hi all, > > > > > > I'm generally in the lab during the afternoon to early evening (though > > > leave a little earlier on Thursdays); 11 am would be doable on Monday, > > > but I'm not sure when I may be busy for the remainder of the week (I > > > have a possible phone interview which hasn't been scheduled yet). > > > > > > As for my input, I suspect its some issue out of my reach - e.g. > > > something with the firmware on the board and/or the way it's being > > > loaded on. I could try to debug it, but most of the processing I do > > > involves taking the buffer from the USB and processing it from there - > > > I haven't delved into the firmware prior to that. > > > > > > I can try to debug it, but it'll likely take me a while. > > > > > > - Andrew