Pixel-level Sampling CMOS Vertex Detector for ILC
The Continuous Acquisition Pixel (CAP) Initiated
Collaboration on ILC Pixel Vertex Detector
CAP Development Effort
Our Pixel Vertex Detector R&D Effort for ILC is an outgrowth of a
pixel upgrade effort for the Belle
detector at the KEK B Factory. For this further development we
are joined by Fermilab, and consist of groups from Europe, Japan and the US. Any readout
architecture capable of surviving the much harsher Super KEKB
environment, should be a viable alternative for an ILC Pixel Vertex
Detector. Given the near-term nature of this development, it provides
the possibility to evolve and test a full detector system under actual
running conditions at the world's highest luminosity collider.
Deep submicron CMOS shows great promise for ILC vertexing
through the implementation of complex algorithms to reduce occupancy.
We intend to explore these possibilities.
To be studied:
-
Thinning/active edges.
-
EMI impact on pixel storage and readout.
Recent Presentations:
Recent Publications:
- Nucl. Instr. Meth. A541 166 (2005).
- IEEE Trans. Nucl. Sci. 52 1187 (2005).
Questions about this page? Please contact varner@phys.hawaii.edu.
This page was last updated 6 November 2005.